POOL32A 000000 |
rt |
rs |
sa |
SHLL.PH 001110110101 |
POOL32A 000000 |
rt |
rs |
sa |
SHLL_S.PH 101110110101 |
6 |
5 |
5 |
4 |
12 |
SPECIAL3 011111 |
0 |
sa |
rt |
rd |
SHLL.PH 01000 |
SHLL.QB 010011 |
SPECIAL3 011111 |
0 |
sa |
rt |
rd |
SHLL_S.PH 01100 |
SHLL.QB 010011 |
6 |
1 |
4 |
5 |
5 |
5 |
6 |
SHLL[_S].PH |
Shift Left Logical Vector Pair Halfwords | |
SHLL.PH rdt, rts, sa |
microMIPSDSP |
Shift Left Logical Vector Pair Halfwords |
SHLL_S.PH rdt, rts, sa |
microMIPSDSP |
Shift Left Logical Vector Pair Halfwords |
Shift Left Logical Vector Pair Halfwords
Element-wise shift of two independent halfwords in a vector data type by a fixed number of bits, with optional saturation.
rdt = sign_extend(sat16(rts31..16 << sa) || (rts15..0 << sa))
The two right-most halfword values in register rts are each independently shifted left, inserting zeros into the leastsignificant bit positions emptied by the shift. In the saturating version of the instruction, if the shift results in an overflow the intermediate result is saturated to either the maximum positive or the minimum negative 16-bit value, depending on the sign of the original unshifted value. The two independent results are then written to the corresponding halfword elements of destination register rdt.
The sign of the left-most halfword result is extended into the 32 most-significant bits of the destination register.
This instruction writes a 1 to bit 22 in the DSPControl register in the ouflag field if any of the left shift operations results in an overflow or saturation.
No data-dependent exceptions are possible.
The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.
SHLL.PH: tempB15..0 = shift16Left( GPR[rts]31..16, sa ) tempA15..0 = shift16Left( GPR[rts]15..0, sa ) GPR[rdt]63..0 = (tempB15)32 || tempB15..0 || tempA15..0 SHLL_S.PH: tempB15..0 = sat16ShiftLeft( GPR[rts]31..16, sa ) tempA15..0 = sat16ShiftLeft( GPR[rts]15..0, sa ) GPR[rdt]63..0 = (tempB15)32 || tempB15..0 || tempA15..0 function shift16Left( a15..0, s3..0 ) if ( s3..0 = 0 ) then temp15..0 = a15..0 else sign = a15 temp15..0 = ( a15-s..0 || 0s ) discardt15..0 = ( sign(16-s) || a14..14-(s-1) ) if (( discardt15..0 != 0x0000 ) and ( discard15..0 != 0xFFFF )) then DSPControlouflag:22 = 1 endif endif return temp15..0 endfunction shift16Left function sat16ShiftLeft( a15..0, s3..0 ) if ( s3..0 = 0 ) then temp15..0 = a15..0 else sign = a15 temp15..0 = ( a15-s..0 || 0s ) discard15..0 = ( sign(16-s) || a14..14-(s-1) ) if (( discard15..0 != 0x0000 ) and ( discard15..0 != 0xFFFF )) then temp15..0 = ( sign = 0 ? 0x7FFF : 0x8000 ) DSPControlouflag:22 = 1 endif endif return temp15..0 endfunction sat16ShiftLeft
Reserved Instruction, DSP Disabled